New Detectors for Scientific- and Medical Applications
This work is continued by Prof. Dr. Ivan Perić at Karlsruhe Institute of Technology
former group speaker: Privatdozent Dr. Ivan Perić
Development of the novel systems for detection of light and high-energy particles is our research topic. Such instruments are widely applied in the medical imaging, the x-ray astronomy, the synchrotron experiments, the electron microscopy, the high-energy physics and biology.
The design of intelligent sensors in the standard CMOS technologies is one of our main occupations. These technologies are not only suitable for the design of the integrated electronics; high-performance sensors can be built as well.
We have two inventions in the field of CMOS sensors: The high-voltage monolithic pixel detectors implemented in CMOS technologies (the so called "Smart Diode Array" - SDA) and the hybrid pixel detectors based on capacitive chip-to-chip signal transfer ("Capacitively Coupled Pixel Detector" - CCPD).
These detectors are suitable for the applications in the particle physics and the electron microscopy and are the low-cost alternative to other technologies.
In its "proof-of-concept" period, the development of SDAs and CCPDs has been supported by Baden-Württemberg Stiftung.
The SDA technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Two 50-micrometer thin detector layers with 200 million pixels are planned. This project is supported by the Enable Fund of the Faculty for Physics and Astronomy. The development should be conducted in a collaboration between University of Heidelberg (The group of Prof. André Schöning and our group), PSI and other institutes.
Thanks to its high radiation tolerance, the SDA technology represents an interesting option for ATLAS upgrade or CLIC detector at CERN. Collaboration with the institutes in Bonn, Berkeley, CERN and Marseille has been formed.
We are also involved in the development of the detectors in non-standard technologies like for instance DEPFET. DEPFET sensors are invented and produced at the Semiconductor Laboratory of the Max Planck institute in Munich.
Since 2009 DEPFET has the first application in the field of particle physics - the pixel vertex detector of Belle II experiment (SuperKEKB B-factory at KEK, Japan). The project is conducted in a large international collaboration. The main task of our group is the design of the two central readout and control ASICs - DCD and SWITCHER.
The development of the ASICs for Belle II DEPFET detector has been supported by BMBF.
The central task in our group is the design of the integrated circuits. However, the chip-design is only the starting-point for the detector development that comprises the following steps:
- Chip design - concept development, schematic/VHDL code design, verification, layout design/generation. We are using the software Cadence.
- Chip packaging (wire-bonding)
- Electro-mechanical detector design (flip-chip, bump-bonding, mechanics, etc.)
- Test-system development - the most of the test systems are based on the FPGA/USB boards developed in the group for Circuits and Simulations - our "mother-group" and the self-made test software.
- Printed circuit board design in Altium-Designer
- Firmware programming for XILINX FPGAs
- Test-software design in C++/C# (Visual Studio, Linux/Windows QT)
- Detector characterization - electrical tests, experiments on the particle accelerators, etc.
A new CMOS pixel detector structure - the smart diode array
Smart diode arrays are a new family of CMOS pixel sensors. Their unique property is the pixel electronics that is placed inside the sensor diode. The construction of a pixel array without insensitive regions is in this way possible. SDAs can be implemented in commercial CMOS technologies, can be produced thin and have a high radiation tolerance.
Applications: Detection of ionizing particles in HE-physics, synchrotron experiments, transmission electron microscopy, detection of light.
- (Detailed about SDA)
- (Collaborations and results-overview)
- (350nm Chips)
- (Chips in the the deep-submicron technologies)
- (Chips for Mu3e)
- (Chips for LHC)
Capacitively coupled pixel detectors
Hybrid pixel-detectors are the most complex pixel detectors. They are used in the applications where complicated in-pixel signal processing and a fast readout are required. The readout electronics and the sensor are placed on the separated chips; the chip-to-chip connection is usually established by bump-bonding. We are developing a new generation of hybrid pixel sensors that relay on the capacitive signal transmission between the sensor and the readout-chip. There is no need for bump-bonding, which allows construction of low-cost and low-mass hybrid pixel detectors.
Applications: Detection of ionizing particles in HE-physics, synchrotron experiments
Pixel readout chips are used for the readout of pixel sensors in a hybrid pixel detector. Equipping of every pixel with electronic intelligence improves the imaging properties of the pixelated detectors. One example is the x-ray detector capable to determine the contrast and the wavelength of the x-ray radiation and in this way produce x-ray images "in colour".
Applications: Detection of ionizing particles in HE-physics, medical x-ray imaging, synchrotron experiments, biology.
Low noise photon-counting pixel detectors
In the past 40 years, the CMOS technologies were rapidly developed - the CPU transistor count doubled, and the transistor size scaled down by one third, every second year. Such a development has not only a good impact to the design of digital circuits. It also allows the design of the very low-noise pixel detectors. Our goal is the design of sub-electron noise sensors for the detection of visible light photons.
Application: detection of visible fluorescent light in biology - cell- and gene-research.
Pixel detectors in SOI technology for FEL- and synchrotron-applications
We are involved in the development of the detectors in SOI technology. This interesting technology has been developed by the institute KEK (Japan), the Japanese microchip foundry LAPIS (formerly OKI) Semiconductor and another research institutes; it allows for implementation of CMOS circuits on a fully depleted substrate. The combination of a wide dynamic range, fast frame rate and a deep depletion region makes this technology interesting for FEL applications, particularly at XFEL, where a fast readout speed is required.
Application: Synchrotron and FEL experiments
Readout ASICs for the DEPFET detectors
DEPFET is the unique active pixel technology developed at the Semiconductor Laboratory (HLL) of the Max Planck institute in Munich, in collaboration with other institutes. Our group is involved in this interesting development by designing of the readout ASICs.
Applications: Detection of ionizing particles in HE-physics, synchrotron experiments, x-ray detection in astrophysics, biology.
- DEPFET pixel detector for Belle II
"Monolithic detector in high voltage technology": 35 T EUR
"Readout chips and bumping for DEPFET vertex-detector
at SUPERBELLE": 290 T EUR
"Radiation tolerant monolithic pixel sensor": 50 T EUR
(Enable fund of the Faculty for Physics and Astronomy)
"Readout chips for the DEPFET vertex detector at Belle II" - second period: 635 T EUR
Development of a CCPD detector for ATLAS: 12 T EUR
Development of a SOI detector for particle physics: 12 T EUR
New detectors for scientific and medical applications: 10 T EUR
Present and former members
(Speaker, chip-design, development of test systems, FPGA- and software-design, experiments)
(ADCs for CBM and DEPFET: chip-design and tests, development of test systems - current-mode ADCs)
(Electro-mechanical detector design, chip-design, development of test systems)
Hong Hanh Nguyen
(SDA and DEPFET: chip design, development of test systems, FPGA- and software-design)
(SDA: development of a test software in C#)
(SDA: development of a test system, FPGA- and software design)
(DEPFET: development of a system for automated ASICs chracterization)
(DEPFET: chip design, test systems, experiments, FPGA- and software-design)
(SOI: test systems, experiments, FPGA- and software-design)
(SDA: experiments at the particle accelerator, test systems)