Readout ASICs for the DEPFET detectors

The principle of DEPFET detector.

3D layout of the analog channel in DCDBv2 generated with the Gds2Pov software.

DEPFET

DEPFET pixel detectors have been invented by G. Lutz and J. Kemmer at the semiconductor laboratory of the Max Planck institute in Munich and belong to the family of monolithic active pixel detectors with in-pixel signal amplification. Three unique DEPFET properties allow excellent detection performances:

1) the use of special doping to generate the potential wells for the signal charge,

2) the possibility to repeat measurements on the same signal many times, and

3) the possibilty to clear the signal without noise.

Every DEPFET pixel contains a transistor. The transistor current depends on the signal charge stored in the potential well.

DEPFET ASICs

The readout of DEPFET detectors requires the use of two ASICs.

Pixel-rows are controlled by the so called SWITCHER chips. These chips turn on/off the DEPFET transistors of different pixel-rows and thus enable them for readout. SWITCHERs also clear the stored signal charge by means of high voltage signals. DEPFET transistor currents are processed by the multi-channel readout chips. One example of such a chip is the 256-channel DEPFET Current Digitizer - DCD.

Belle II

Since 2009 DEPFET has the first application in the field of particle physics - the pixel vertex detector of Belle II experiment (SuperKEKB B-factory at KEK, Japan). The project is conducted in a large international collaboration. The main task of our group is the design of the two central readout and control ASICs - DCD and SWITCHER. The development of the ASICs for Belle II DEPFET detector has been supported by BMBF since 2008.