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Some history of SPADIC in pictures


 
    << December 2010 March 2011 >>    
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January 2011:
 
The picture shows an Altium screenshot of the 3rd re-design of the SPADIC v0.3 front-end PCB. A completely new separation scheme of all power and ground nets was realized to get rid of ground loops as well as possible pickup-noise sources. The die will be glued on the red area that can be seen in the middle of the picture. Wire-bonds will connect the chip's pads to the (red) wires and power rings.