VLSI-Design

Vorlesungsfolien (© Peter Fischer)

• Introduction (116.9 KB)
• Design Flow (1.8 MB)
• Schematics (941.2 KB)
• Layout: Introduction (299.9 KB)
• Design Regeln (397.4 KB)
• Aktive Bauelemente (3.6 MB)

Übungen (© Peter Fischer)

• Remote Login (265.6 KB)
• Getting Started (313.6 KB)
• Schematics & Hierarchy (184.2 KB)
• A first Layout (957.4 KB)

NDAs:

• Please print, fill and sign the Cadence End User Agrement (148.9 KB).
  The corresponding EUROPRACTICE Software Academic End User Agreement can be found here.

Some usefull external links:

Diodes, Transistors, Fabrication

• Schöne Applets bei SmiLE
• Herstellung Metal-Gate NMOS ohne Selbstjustage (JAVA Animation)
• Sammling von Applets zu diversen Themen der Mikroelektronik (unter 'Browse')
• Infineon Video bei youtube: Herstellung von Chip
• Video von Global Foundries (bei youtube): How a CPU is made
• Zoom in einen MicroChip (youtube)
• Mikrochip ABC

Misc:

• Content not translated into English: Filme zur Herstellung von Leiterplatten (PCBs)
• Content not translated into English: Computer Arithmetik: Theorie und Applets