Add picture of PCB here with highlighted designators.
Power-on reset: POR
Reset all components on the SoC board to their power-on state. This signal is active-low (POR#) and hardware debounced.
The signal is also controlled by the voltage regulators on the SoC board: As long as the regulated output quality is bad, POR is asserted. See also Power good: PWR_GOOD.
Processing system reset: SRST
Reset the PS as well as the PL parts using a PS RESET output. Parts outside the Zynq chip are not reset. This signal is active-low (PS_SRST#) and hardware debounced.
PL user button: BTN0
The button has no predefined functionality. It is connected to the PL section of the Zynq device. The net is pulled up on the baseboard and pulled down upon button press, hence active-low (BTN0#). It is hardware-debounced.
PS user button BTN1
The button has no predefined functionality. It is connected to the PS section of the Zynq device. By default, the Linux gpio-keys kernel driver is bound to this and generates an event. See Zynq PS GPIO peripherals: Button. It is hardware-debounced.
All LEDs (except those on the SoC board) can be disabled by pulling out the LED_EN jumper. It is safe to remove or insert the jumper while the board is powered.
Power good: PWR_GOOD
This LED is controlled by the voltage regulators on the SoC board: As long as the regulated output quality is bad, PWR_GOOD is deasserted, and the POR reset asserted. See also Power-on reset: POR.
Zynq PL programmed: DONE
If the PL part of the Zynq device is programmed, this LED is enabled. This matches the behaviour of previous Xilinx FPGAs.
PL user LED: LED0
This LED is connected to the PL section of the Zynq device. It has no predefined trigger and is under user control. The polarity is active-high.
PS user LED: LED1
This LED is connected to the PS section of the Zynq device. By default, the Linux gpio-leds kernel driver is attached to this. See Zynq PS GPIO peripherals: LED.
SoC board LEDs
LEDs on the SoC board cannot be disabled with the LED_EN jumper.
PL user LED: LED0
PS user LED: LED1
LED1 on the SoC board is routed to PS_MIO15, which also controls the MDIO/I2C mux. If access to the Ethernet MDIO bus is necessary (e. g., to operate the Ethernet interface), PS_MIO15 must be high, as set by the internal pull-up. As LED1 is active-low (LED1#), the LED will not light up if MDIO is selected. If PS_MIO52/PS_MIO53 are used as I2C pins, the LED will light up.
Switches and jumpers
Disable all LEDs (except those on the SoC board) on the base board if the jumper is removed. This is useful for operating the HDROB with photon detectors in a dark environment.
Disable +5V output on the USB header if the jumper is removed. In addition to the software-controlled switch which disconnects the output if the USB port is in device mode, this cuts the VDD output on the USB header if the USB port is used in host or gadget mode.
Select the voltage level for single-ended user I/Os, indicated by the prefix SOC_C. This must be set in accordance with the IOSTANDARD directive defined in the Vivado constraint file, either 1.8V or 3.3V.
Do not remove or switch the jumper position while the board is powered, as this may cause permament damage to the SoC module.
Select the boot image source. See Zynq booting: Boot sources.
The rotary encoder is made of four switches, interfaced to the PL section of the Zynq via the IO0 to ID3 lines. The selected value is encoded as 8-4-2-1 BCD with active-high signals.
Headers, connectors and test points
Most of the user connectors are safe to be connected and disconnected while the board is powered. They are protected against ESD as long as the GND net is connected to discharge static electricity.
The D-GPIO, SOC_MON0 and SOC_MON1 are not protected although the connectors are located on the left-hand, user-accessible board edge.